Design of a Lightweight Convolutional Neural Network Accelerated by FPGA

Image classification has widespread applications in various fields such as medical diagnosis, autonomous driving, security surveillance, and manufacturing. The existing architecture has a complex computation workload, leading to increased latency. This paper designs and implements a convolutional neural network architecture accelerated by FPGA, quantizing the parameters to int14 fixed-point integers, achieving an effective recognition rate of 98.2 % for handwritten digits. By reducing the number of parameters and arithmetic operations, the difficulty of deploying this CNN architecture on hardware devices is lowered, it also reduces the usage of storage resources, the combination of parallel computation of convolutions with pipelining operations improves the real-time performance of the overall architecture. Utilizing the resources on the ZYNQ-7020 FPGA development board to build the CNN architecture, achieving a prediction time of 86.02 μs for a single image under a clock frequency of 50 MHz, compared to existing architectures, it has significant advantages in terms of real-time performance.