Fault localization of Cold-temperature Scan failures by integrating Soft Defect Localization and Electro-Optical Probing

Scan testing has been the main method for testing in the semiconductor industry due to its extremely high test coverage and high reliability in determining the suspected region of failure. Scan test failures typically fail solidly across voltage, frequency, and temperature. However, there are scan failures that would only fail at cold temperatures and are classified as temperature-dependent scan failures. Electro-Optical Probing (EOP) analysis is usually performed when the part fails to observe abnormal transistor switching activity. However, The main challenge behind cold temperature scan failures is the inability to perform EOP at very cold temperatures mainly due to tool limitations with conventional tool setup. This paper will further discuss a new approach by performing EOP at room temperature on three different types of scan failures (Stuck-at, Time-delay, and Chain) that would still yield tangible fault isolation results by referencing the Soft Defect Localization (SDL) hotspot performed at cold temperature.