A 6-9 GHz 1.28 Gbps 76 mW Amplitude and Synchronized Time Shift Keying IR-UWB CMOS Transceiver for Brain Computer Interfaces

This paper proposes a low-power, high-speed impulse radio-ultra-wideband (IR-UWB) transceiver for brain computer interfaces (BCIs) using amplitude and synchronized time shift keying technique (ASTSK). The proposed IR-UWB transmitter (Tx) generates two pulses (sync pulse and data pulse) per symbol rate. The time difference between two pulses is used for synchronized time shift keying and the amplitude of the two pulses is used for amplitude shift keying. The receiver (Rx) demodulates the time difference with a low power time-to-digital converter (TDC) and peak detector (PD) based amplitude demodulation is suggested to relax analog-to-digital converter (ADC) burden for low power receiver. Especially the Tx-based synchronized operation eliminates the need for complex clock circuitry such as phase-lock loop (PLL) and reference crystal oscillator. Therefore, it can achieve low power and high-speed operation. The prototype, fabricated in 65 nm CMOS, has a frequency range of 6-9 GHz, communication speed of 1.28 Gbps, and power consumption of 18 mW (Tx) and 58 mW (Rx). This work is a fully integrated RF transceiver adapted for high-order modulation and designed to include the receiver.