Power Optimization Tuning Techniques for Core C-States in Microprocessors with Hybrid Architecture

Contemporary processors are designed to operate indefinitely under a specific load. However, CPUs rarely function at their full capacity all the time, as users don't always perform tasks that require maximum resource utilization. Consequently, it is unnecessary to keep CPU cores always running at their highest frequency. Modern processors employ a technology called "C-states" to manage the power consumption of each individual processor core. This study investigates Core states (C-states) and proposes an optimized method for adjusting the mechanisms of core demotion and promotion to conserve energy when additional power usage offers no substantial benefits. Such inefficiency leads to a poor performance-to-cost ratio, making the processor less appealing to consumers. While the goal is to improve performance, enhancing battery life is equally important with each new product generation. The proposed tuning approach achieves over 5% performance increase while also reducing power consumption by more than 5% across the silicon.