Fast and Energy Efficient (0.01-2.78 aJ) Logic In Memory Module using SRAM Cells

Von-Neumann architecture has been the popular choice for the processing of instructions for various applications. With the scaling of MOSFETs, the performance of logic gate improves and interconnect delay becomes barrier to latency during instruction execution. Solutions for this are logic in memory (LIM), in-memory computing (IMC). In this paper, 6T and 8T static random access memory (SRAM) cells are used for in memory computing applications. 8T static random access memory cell-based logic offers better noise margin and consumes less energy compared to 6T cell-based logic. While observing logical NOR operation using 6T cell the maximum delay of 37.96ps occurs for the input 10 and power consumption of 40.58µW for the input 00/11. When the same operation had performed with 8T cell the maximum delay of 17.67ps occurs for the input 01/10 and power consumption of 157.4nW. Therefore, 8T SRAM based LIM can provide energy efficient solution.