Comparative Performance Analysis of Adder Circuits Using Different CMOS Technologies

In this work, we have designed and analyzed three different types of adder circuits using three different CMOS technologies (45nm, 90 nm, and 180nm). Here, we have performed the transient analysis to observe the dynamic behavior of the adders. Signal integrity and power estimation are performed to measure the circuit performance in terms of data processing speed and power consumption. It is observed that the 45nm technology-based adder circuit is performing better compared with the other two technologies (180nm and 90nm) in terms of delay (‘2 ” better than the other two technologies). Similarly, power consumption is (‘” 2 x) better than the other two technologies. The findings will provide valuable insights for selecting the most suitable adder circuit and technology for different applications.