Zero Temperature Coefficient Study Regarding the Half-Diamond Layout Style for MOSFETs

This paper studies the behavior of the Zero Temperature Coefficient (ZTC) of the first element of the second generation of the gate layout styles for MOSFETs, the Half-Diamond MOSFET (HDM). This work was performed based on three-dimensional (3D) numerical simulations (3D-NS) initially fitted by experimental data at room temperature. Camillo-Martino ZTC analytical model (CM-Model) application demonstrated a good agreement (maximum error of 5.9% above 400K) with the simulations in predicting the ZTC point behavior of a Bulk HDM for high temperatures.