Design of Multi-valued Logic Schematics using GNRFET and RRAM Technologies

The possibilities of Resistive Random Access Memories (RRAM) and Graphene Nanoribbon Field-Effect Transistors (GNRFETs) for creating multi-valued logic circuits using HSPICE tool, which may result in more potent and effective computer designs. The graphene nanoribbon field effect transistor (GNRFET) has been exclusively used for the implementation of MVL circuits. Resistive random-access memory (RRAM) offers a very durable option for executing the MVL due to its capability of storing various resistance states in one cell. The new designs of multi-valued logic gates make use of RRAM’s resistance states and GNRFETs’ distinct electrical characteristics. Energy consumption, time delay and PDP (power delay product) are just a few of the circuit performances were closely examined. In an effort to possibly attain the best possible functionality and performance, hybrid GNRFET-RRAM architectures are also being studied. The goals of this research are to explore new computing architectures made possible by these promising technologies, demonstrate increased circuit performance, and advance the concepts of multi-valued logic design. Using GNRFETs and RRAMs, this project holds immense potential to reduce power consumption, increase information density, enhance computational efficiency. Using HSPICE and Cosmo scope tools this project analyze the circuit metrics like power consumption, delay, PDP and these metrics were compared with theoretical predictions to optimize the digital designs. The simulations have been performed by using HSPICE (2013 version) software with the Standard 32 nm GNRFET model at 0.9 V supply voltage.