Design of CMOS Based Lc-Voltage Control Oscillator Using Substrate Bias Effect and Low-Voltage Folded-Cascade Current Mirror Circuit

This paper Proposed to design a CMOS Based LC-Voltage Control Oscillator Using Substrate Bias Effect and Low-Voltage Folded-Cascade Current Mirror Circuit using an LC tank circuit at 2.5GHz oscillation Frequency. The paper delves into the substrate-biasing technique, which adjusts the threshold voltage of a CMOS transistor, and the low-voltage folded-cascade current mirror circuit that utilizes CMOS technology to improve the performance of the current mirror circuit. The folded-cascade current mirror circuit comprises of a cascade structure in the input stage and a folded structure in the output stage, which is used to increase the output impedance and provide a more stable output current. The paper concludes that the folded-cascade current mirror circuit is a powerful tool in CMOS circuit design, offering improved performance and accuracy over the traditional current mirror circuit. In this simulation is carried out through cadence virtuoso generic process design kit (GPDK) with 90nm technology. The simulation results exhibits phase noise of -154.92 dBc/Hz @ 1MHz, low power consumption of 4.8mW and the Figure of Merit -216.09 dBc/Hz at 2.5GHz oscillation frequency