Design of a Novel PLL for Application in Distributed High Frequency Bands

This manuscript outlines the design of a high frequency distributed bands PLL which is applicable for use in various RF communication systems. The proposed PLL comprises of two voltage controlled oscillators (VCOs) operating in the range of 3.8 GHz to 7.59 GHz and 8.40 GHz to 9.54 GHz. The novelty of the PLL is along with Phase Frequency detector (PFD) and Charge Pump (CP) it utilizes different order low pass filters (LPF) depending on the frequency of operation to reduce the spur. The design is carried out in cadence 90nm GPDK. At 4.5 GHz operating frequency of the PLL, phase noises are found to be -93.15 dBc/Hz at 1Mhz and -118.79 dBc/Hz at 10 MHz whereas at 8.5 GHz the phase noises are - 89.94 dBc/Hz at 1 MHz and -115.64 at 10 MHz. The reference Spur is maintained when operating at higher frequency band due to the use of 2
^nd
order LPF.