Evaluating the Performance of Micro-Bump Flip-Chip Packaging Enhanced by Copper Paste

In the rapidly evolving domain of microelectronics packaging technology, the pursuit of alternatives to traditional solder materials is driven by the imperative need for enhanced mechanical performance, reliability, and environmental sustainability. This study delves into the utilization of Cu paste as an interconnect material in Flip-Chip packaging, specifically focusing on micro-bumps with a diameter of
$20\mu\mathrm{m}$
. The investigation centers on the effects of various sintering pressure conditions (lMPa, 3MPa, 5MPa, and 10MPa) on the mechanical and electrical performance of the packages. The experimental findings reveal that the samples sintered under the pressure of 5MPa exhibited the highest shear strength of 31.87MPa, suggesting a significant improvement over traditional solder-based packages. Conversely, sintering at 10MPa resulted in a reduction of shear strength to 28.78MPa, indicating a nuanced relationship between sintering pressure and mechanical performance. Regarding electrical performance, all samples maintained a resistivity around
$13.5\Omega$
, marginally surpassing the traditional solder resistivity of
$14.2\Omega$
. Thermal shock tests based on the JEDEC standard No. 22-A104-B were conducted on samples sintered at 1MPa. The tests, comprising 50, 100, 500, and 1000 cycles, were designed to simulate extreme operational conditions and assess the packaging's thermal stability and durability. This work substantiates the viability of Cu paste as a superior alternative to traditional solders, with enhancements observed in both mechanical strength and electrical resistivity.