Study on the Failure of the Middle Solder Joints of the Large-Size FCBGA

With the advent of the 5G era, FCBGA devices with large sizes and high stacking layers are being widely used. FCBGA uses solder joints to connect chips and substrates, and has advantages in high speed, high density, and low power consumption. However, solder joints of large-size FCBGA have a high failure risk in the board-level temperature cycle process, and the common failure locations are all in the corners of substrate. In this paper, the large-size FCBGA of $6\times \text{mm}^{\ast}6\times \text{mm}$ is taken as the research object. During the test, it was found that the solder joints in the middle of substrate were prone to failure, while the solder joints at the corners have a low risk of failure. Therefore, the effects of the CTE of substrate and PCB, and solder joint shape on solder joint failure in the middle location are analyzed through simulation, and proposes to predict the risk location through simulation in the package design phase, and then design a proper dummy ball at the risk location for stress buffering, so as to avoid the failure of functional solder joints.