Fabrication of High Aspect Ratio TSV Interposer with Cu-Cu Direct Bonding

A high aspect ratio TSV (Through-Silicon Via) interposer process is introduced, which can achieve high interconnect density and better electrical performance. Scaling down the TSV diameter is attractive with the increasing requirement of higher integration density. However the thickness of the interposer should not be too thin in order to ensure the mechanical strength, so the demand for higher aspect ratio TSV is becoming more and more urgent. Normally, when the aspect ratio of TSV is less than 12:1, the insulator/barrier/seed layer are prepared by CVD and PVD, but when the aspect ratio is over 12:1, the traditional CVD and PVD processes reach their limits. ALD linear oxide and ALD barrier/seed layer were introduce to solve this problem, and this is the only feasible technical solution for high aspect ratio TSV at present. In this paper, a 2.5D silicon interposer with a ultra high aspect ratio TSV has been fabricated, by stacking two
$\mathbf{6}\times \mathbf{50}\boldsymbol{\mu} \mathbf{m}$
TSV wafers with Cu-Cu direct bonding. The CSAM (C-Scan Acoustic Microscopy) scan shows void free bonding result, and the SEM cross-section also support this conclusion, showing that the two TSV wafers are bonded together without obvious bonding interface, alignment accuracy between the two TSV wafers is about
$\mathbf{0.4}\boldsymbol{\mu} \mathbf{m}$
, and the TSV is about
$\mathbf{6}\times \mathbf{99}\mathbf{m}$
, aspect ratio of TSV can reach about 16:1. The DC resistance of the daisy chain circuit are measured, the result is in general agreement with theory, and the TSV daisy chain yield is higher than 80%.