Low-temperature Thermal Shock Simulation and Life Aging Test of Indium Flip-chip Interconnection Using Liquid Helium for Superconducting Integrated Circuit Package

Superconducting integrated circuits, known as Single Flux Quantum (SFQ) circuits, operate at cryogenic temperatures, specifically 4.2K, leading to a significant temperature difference of nearly 300K from room temperature, inevitably causing reliability issues in flip-chip interconnects. Current research on the reliability of flip-chip interconnects in cryogenic environments predominantly focuses on the liquid nitrogen temperature range, with limited studies in the liquid helium temperature range. This paper provides a reference for such research. In this study, the stress and strain in indium bumps of flip-chip interconnects under cryogenic thermal shock were simulated. Finite element simulations provided the stress- strain distribution in the bumps under cryogenic thermal shock. An Anand viscoplastic model for indium bumps was established. Additionally, the Darveaux lifetime prediction model was used to estimate the lifetime of indium bump flip-chip interconnects under cryogenic thermal shock. The stress-strain was predominantly concentrated at the interface of the bumps with the chip and substrate, reaching a maximum at a temperature of −269°C, with a maximum equivalent stress of 31.1 MPa and a maximum equivalent strain of 0.0024. The simulation predicted a lifetime of 824 cycles. Furthermore, cryogenic shock tests revealed that the flip-chip modules experienced cryogenic failure and recovery at room temperature. SEM cross-section analysis showed cracks in the bumps at low temperatures. Subsequently, process optimization was conducted to fabricate a new batch of flip-chip modules and the low temperature thermal shock test was planned.