Nonvolatile Quaternary Pre-Charged MRAM Cell Design based on Emerging Technologies

The remarkable attribute of multi-valued logic (MVL) in addressing the restriction of binary systems has spurred extensive research. Among various MVL types, quaternary logic exhibits greater compatibility with existing binary systems. The primary challenge in MVL lies in the hardware implementation of MVL circuits, which requires multi-threshold voltage transistors. Thanks to the nonvolatility feature of the magnetic tunnel junction (MTJ) device, a nonvolatile quaternary pre-charged memory based on FinFET/MTJ and CNTFET/MTJ is proposed in this paper. Regarding both CNTFET and FinFET designs, simulation results report a great reduction of up to 80% in read delay and up to 97% in power delay product (PDP). Also, the CNTFET-based structure consumes up to 33% less static power compared to the previous designs.