Investigation of Power Device Solder Void Formation by Two-Phase Flow Simulation

Higher power capabilities and efficiencies require a shift from wire-bonded power packages to copper clip-bonded power packages, with larger clip and die expected. This trend has resulted in larger clip-attach and die-attach areas, creating challenges with higher rates of solder voiding, and resulting in deterioration in thermal and electrical resistance, as well as package reliability. There is a high demand to understand the formation and growth mechanisms of solder voids. When direct process observation is not practical, visualization by numerical analysis is a feasible way to explore the reaction process inside the solder. This study applies the Volume of Fluid (VOF) method to track the interface evolution between solder flux bubbles and molten liquid solder to depict the flux evaporation and relevant dynamic processes within the liquid solder. A combination of 2D and 3D domain Computational Fluid Dynamics (CFD) simulations reveal that the clip with slots has fewer and smaller solder voids formed compared to the full coverage clip. The reflow soldering experiment result validated this trend. The 2D domain results indicate that evaporated flux bubbles are trapped by solder-repelling spots near or passing through, revealing an incomplete solder wetting formation mechanism. The 3D domain results show that clip warping can cause uneven outlet areas with different outgassing velocities, leading to voids forming around small outlets. The combination of 2D and 3D domain CFD simulations is proved to be an effective way to provide visual scenarios to explain solder flux behavior during the reflow process and can serve as an applicable technique to theoretically evaluate further optimization methods.