A 580-nA Quiescent Current Low-Dropout Regulator with Zero-Tracking for Wide Load Applications

A Zero-Tracking (ZT) Low-Dropout (LDO) voltage regulator stability improvement technique is proposed in this paper. The tracking network functions by adding internal feedback compensation which follows the current at the load to control the position of the zero in the LDO, thereby increasing the phase margin (ϕ
M
) focusing on performance at low currents. The proposed LDO is designed in a TSMC 180-nm 1.8 V standard CMOS technology. With step load of 0 - 50 mA, 30 ns edge time, the regulated output is maintained at 1.8 V. The measured undershoot and overshoot voltage are 81.3 m V and 52.5 m V, respectively. The proposed LDO is being targeted for low quiescent current (I
Q
) applications. With no-load current, the I
Q
is measured at 580 nA.