Reduced Overshoots, Oscillations and dV/dt Generation in Parallel Connected SiC MOSFET Modules with Optional Active Current Balancing

Silicon Carbide MOSFETs offer increased switching speeds, reduced filtering component sizes and lower switching losses when compared to Silicon IGBTs in power converters. However available module current ratings, increased oscillatory switching behaviour, large drain-source voltage overshoots and high output voltage dV /dt levels are all limiting factors to their adoption in medium to high-power applications. The use of inter-device inductances with switching edge skewing has previously been demonstrated as a method of limiting current imbalances when paralleling modules. This paper shows that by precisely controlling the timing skews applied between modules in such arrangements, substantial overshoot, oscillation and output voltage dV /dt reductions can also be achieved. In addition, if current feedback is included, the module switching order can be varied to facilitate a fixed-skew active current balancing strategy. The mechanisms behind all of these effects are analysed in detail, focusing on the impact of applied timing skew and inter-device inductance on the improvements. An experimental investigation validating the current balancing, switching performance improvements and reduced output voltage dV /dt is also presented using 400 A 1.2 kV half-bridge modules, with up to 4 modules in parallel at a total load current of 1600 A