Novel Single-Temperature Trim Techniques for Bandgap Voltage References

This paper presents a single temperature trimming technique for temperature-sensitive circuits with a special emphasis on bandgap voltage references. We first present an approach for estimating the temperature profile of the reference output, VREF(T) using information obtained from single-temperature measurements of multiple node voltages in the circuit-under-test (CUT). Based on the results of this estimation technique, we further propose two single-temperature trimming techniques. We validate our proposed techniques on a typical Kuijk bandgap voltage reference in a standard 180nm CMOS process. Simulation results show that our estimation technique can accurately predict the thermal profile of VREF from only room temperature node voltage measurements with a maximum estimation error of 200ppm over a 165°C temperature range. With this estimation performance, the proposed trim techniques yield post-trim temperature coefficients comparable to that obtained by costly traditional two-temperature trim methods.