A 50-Gbps 4-Channel DWDM Transceiver in monolithic 45-nm CMOS Si-Photonics SOI Technology - Concept and Design

A concept and design of a 50-Gbps 4-channel dense wavelength division multiplexing (DWDM) optical transceiver is being developed. It is designed in a 45-nm monolithic silicon-photonics CMOS technology. The design targets to meet the rising data throughput requirements of high-resolution detectors in high-energy physics and photon science. We discuss the key components of the transceiver, emphasizing high-speed ring modulators, ring resonators and their electronic circuitries, highlighting the advantage of the monolithic integration. The transmitter concept is based on multi-wavelength light coupled into a single waveguide to be modulated by cascaded ring modulators at their resonant wavelengths within free spectral range of 9.3 nm. The dedicated electronic circuitry to modulate ring modulators contains custom-designed 10-to-1 multiplexer followed by a dedicated driver with asymmetrical differential voltage of 1.5 V. The multiplexer and driver consume only 0.7 pJ/b at 12.5 Gbps. An array of four 2^nd order ring resonators are cascaded to demultiplex the transmitted spectrum at the receiver side. The spacing between the channels is designed to be 400 GHz (2.1 nm) to ensure the device peformance. We examine the temperature dependencies of ring modulators and resonators to determine the tuning range available by biasing the heating element. Furthermore, the correlation between crosstalk among the channels and channel spacing is addressed. Through comprehensive electrical-optical co-design simulations, we present the feasibility and performance potential of our proposed optical transceiver paving the way to realize efficient and compact detector systems.