An FPGA-Based Time-to-Digital Converter with Online Calibration Methodology

This paper introduces an effective online compensation mechanism for time-to-digital converters (TDCs) implemented on Field-Programmable Gate Arrays (FPGAs), which are highly sensitive to process, voltage, and temperature (PVT) variations. The online compensation strategy exploits the synergy between an external high-precision clock signal and the internal chip clock for real-time correction of TDC outputs. Our TDC architecture incorporates a coarse-fine counting scheme, complemented by a start-stop calibration module and a ring oscillator for precise time compensation. The proposed TDC system has been successfully implemented and tested on a Xilinx Artix-7 35T FPGA board. Measurement results demonstrate that our system achieves a minimum time resolution of 18.9 picoseconds (ps) and maintains a root mean square (RMS) resolution within 20 ps, even under temperature variations.