Modified SPICE-Compatible Model Integrating NBTI and Self-Heating Effects for VDMOS Transistors

This paper describes a modified SPICE-compatible VDMOS transistor model that includes NBT and self-heating effects. A complete circuit diagram of the transistor is given, which includes the electrical part of the circuit that models the NBT effect and the equivalent thermal part of the circuit that models the self-heating effect. The parameters of the model were determined based on the technical documentation and the fitting method based on the performed experiments. Fresh transistors and NBT-stressed transistors, with and without a heatsink in the load-driving circuit, were considered. The results of experiments and simulations correspond to each other with a maximum deviation of up to 10%. The proposed model can be used in the design and analysis of transistor reliability parameters.