Implementation of Bayesian Network Based on Ultra-High-Speed Superconductor Random Number Generators

A Bayesian network (BN) is a graphical model that represents causal relationships between events. BNs have been widely used in applications such as forecasting, diagnosis, and classification. However, analyzing large-scale BNs can lead to a computational explosion due to the exponential growth in network complexity. Hardware implementation of BNs can address this computational challenge. In this study, we designed and tested BN hardware based on superconductor integrated circuit technology. We used a superconductor random number generator, where the output probability of “1” can be controlled by adjusting the input control current, as a node in the BN. Since the “1” output probability is controlled according to the previous node’s output, the conditional probability table (CPT) in the BN can be represented. We designed a two-node BN capable of operating at a clock frequency of 20 GHz, which is two orders of magnitude higher than previously implemented BN hardware. The proposed BN offers a more than three order advantage in power consumption over existing technology, even when considering cooling costs. We experimentally demonstrated the correct operation of the two-node BN. This is the first demonstration of information processing using an ultra-high-speed superconducting random number generator.