Compact Modeling of the Pulse Modulation of the Resistive Switching Memory for Closed-Loop Multibit Write Operation

The nonlinearity and variation of the conductance tunning in resistive switching devices pose challenges in writing discrete levels to multibit cells for data storage and to artificial synapses for neuromorphic applications. Therefore, it is crucial to accurately predict the nonlinearity and fluctuation of conductance changes. In this study, we propose a compact model that takes into account pulse-induced fluctuations (pulse-to-pulse variations) and fluctuations caused by state changes after the pulse operations (settlement variations), which can accurately capture the fluctuated conductance changes under arbitrary pulse amplitudes and durations to address this issue. Using the proposed compact model, two closed-loop writing or weight transfer/update schemes, namely, uniform pulse amplitude scheme and incremental pulse amplitude scheme, are analyzed and compared. The proposed compact model is a useful tool to predict and optimize the closed-loop weight update schemes after it is calibrated by the experimentally available conductance tuning curves.