Time Delay Unit Architecture Optimization for 2-D Rectangular Phased Antenna Arrays

A recently introduced method for optimizing the time delay unit architecture (TDU-A) of 1-D phased antenna array (PAA) is expanded for the first time to the generalized 2-D PAAs. The presented method minimizes the cost, complexity, and power by minimizing the number of TDUs and bits while achieving the phase requirement. Presented optimization examples clearly demonstrate the potential (e.g., 66% reduction in TDU count) by finding an optimal TDU-A out of many configurations (e.g., 1: 179 011) while achieving the desired scan performance.