Mutual Impacts of Different Dead-times and Control Sample Times on SiC Inverter Loss in Experimental Motor Drive at High Carrier Frequencies

At high pulse-width modulation (PWM) carrier frequencies up to 200 kHz using silicon carbide (SiC) devices, the individual and mutual impacts of the sample time and dead-time on the SiC inverter loss in a motor drive system may become significantly. Thus, these issues under load condition are experimentally investigated and analyzed in the present study, where the dead-time is from 250 to 1000 ns and the control sample time is from 100 to 1000 μs. Furthermore, the measured results with the SiC metal–oxide-semiconductor field-effect transistor (MOSFET) inverter are briefly compared to that with the silicon (Si) insulated-gate bipolar transistor (IGBT) inverter for reference. Moreover, the total harmonics distortion (THD) of the measured voltage and current of the considered interior permanent magnet synchronous motor (IPMSM) is provided to explain the results. Finally, insights with theoretical analysis are shown as complementary explanations of the experimental findings. The outcome of this research can be treated as a reference in choosing the suitable value of the control sample time for IPMSM drive systems using SiC-MOSFET inverters.