32-Bit Fixed and Floating-Point Hardware Implementation for Enhanced Inverter Control: Leveraging FPGA in Recurrent Neural Network Applications

Traditional microcontroller-based control systems increasingly face limitations due to their restricted capabilities and lack of parallel processing, creating bottlenecks in real-time energy optimization. This research introduces a novel approach to implementing a Recurrent Neural Network (RNN) model on a Field-Programmable Gate Array (FPGA) board. By harnessing the FPGA’s parallel processing power, the research aims to overcome these limitations and enhance the performance of inverters. The programming for a four-input, two-output RNN model featuring a Tangent hyperbolic (Tanh) activation function is designed for 32-bit fixed and floating-point operations using Intel Quartus Prime software. A crucial aspect of this study involves meticulous timing and resource analyses to optimize the design’s performance on the FPGA. Furthermore, the digit and bit accuracy of the FPGA implementation is rigorously verified against MATLAB and ModelSim simulations, ensuring the reliability of the results. The proposed method of FPGA implementation not only demonstrates a cutting-edge technique for Neural Network applications but also sets a precedent for further explorations into various types of Neural Networks (NN). This research thus opens new avenues for the innovative application of FPGA technology in the field of NN, potentially revolutionizing the way these systems are designed and implemented.