HSTL IO Standards Based Low Power Implementation of Elliptic Curve Cryptography (ECC) on FPGA

There is a new trend in researcher to use elliptical curve theory for derivation of an efficient, faster and smaller key that will use in lightweight cryptography also known as elliptical curve cryptography (ECC). In this work, we are using High Speed Transceiver Logic (HSTL) IO standard to develop an energy efficient ECC and implementing the Hardware Description Language (HDL) code of ECC on Kintex-7 Field Programmable Gate Array (FPGA). HSTL_II_18 is taking 53.73 % more power in comparison to HSTL_I IO standards. The implementation with HSTL_I or HSTL_II_18 will deliver same result of encryption but power requirement will change. Wise selection of IO standards playing an important role in overall power dissipation during implementation of ECC on FPGA.