Applying the Time-Domain Paradigm to Interface Multilevel Phase Change Memory

Phase Change Memory (PCM) is a prominent non-volatile memory technology that offers high-density, mul-tilevel solutions. However, the circuitry required to read and write such devices has not been fully solved due to the highly non-linear behaviour of these devices and the complex voltage and current ranges required for reliable operation. Most of the proposed interfaces require very large area and power consumption and are accompanied by an odd form factor. This study explores time-domain interfaces as a potential solution for driving PCM cells by linking the physical attributes of the devices to a time variable. Here, we present a proof of concept for the implementation of time-domain interface architectures adapted to this type of memory.