Thermal Simulation of ML Applications on a Commercial DRAM-Based PIM

With the advancement of machine learning (ML) and growing parameter sizes of ML applications, off-chip memory accesses have increased significantly, leading to a memory bottleneck. To overcome this challenge, DRAM manufacturers began to revisit processing-in-memory (PIM) architectures, and have commercialized DRAM-based digital-PIMs. However, since processing units (PUs) are placed near DRAM banks in the PIMs, heat generated from the PUs raises the temperature of the DRAM cells. To cost-effectively mitigate thermal problems, it is imperative to predict the temperature of the PIMs at the early design stage. In this paper, we explore the power and thermal behavior of a commercial PIM with a measurement-based power model. Different from the common approach in prior works that utilizes the maximum power density, we utilize the memory power traces of real-world ML applications for realistic temperature prediction. Our evaluation results show that the converging transient temperature of the PIM with the power traces of the ML applications is up to
${ 15.4} ^\circ C$
lower, compared to that with the maximum power density.