Design of Integrated Circuit Auxiliary Testing Scheme Based on FPGA

In response to the problems of high complexity in writing test vectors and poor universality of load board in integrated circuit testing, this paper designs an integrated circuit auxiliary testing scheme based on FPGA technology. The FPGA board is connected to the load board through an IO interface, and with the rich IO resources of FPGA, more testing channels are expanded for chip functional testing; In addition, the scheme use control vectors to transfer some of the test vectors from the ATE machine to the FPGA board for execution, which simplifies the complexity of writing test vectors in ATE machine. Finally, the proposed scheme was tested by building an experimental platform, and the experimental results verified the effectiveness of the auxiliary testing scheme proposed in this paper.