A Static Power Estimation Method for Nanoprocess Library Characterization in Gate Level Physical Design

In this paper, we propose a path-driven propagation algorithm based on toggle rate and static probability, according to the characteristics of signal paths in gate-level physical design. This algorithm aims to calculate the internal power of cells more accurately, considering the characterization rules of standard cell libraries under nanometer technology. We have developed a corresponding power estimation engine based on the designed analysis framework. Experimental results demonstrate that the total power estimated using this method has an error of 1.37% compared to Primepower and a -14.04% error compared to Redhawk. Considering the capability of this method to quickly and accurately estimate static power consumption in gate-level physical design, despite the increased memory usage, it provides an effective simulation and optimization approach.