Design and Simulation of Three-Phase Phase-Locked Loop Based on Cascaded DSOGI

The actual operating conditions of the grid are non-ideal and complex, with problem such as three-phase imbalance and harmonic pollution being quite common, significantly increasing the difficulty of phase-locking. The Dual Second-Order Generalized Integrator Phase-Locked Loop (DSOGI-PLL) technology effectively solves the difficulty of phase-locking in the presence of three-phase imbalance in the grid. However, its ability to solve DC offset problem is limited. Therefore, this paper proposes a Cascaded Dual Second-Order Generalized Integrator Phase-Locked Loop (CDSOGI-PLL) technology to suppress DC component interference in the grid, while significantly enhancing the phase-locking performance of the loop and improving system robustness. Finally, the effectiveness of the technology described in this paper was verified through simulation models built on the Matlab/Simulink platform.