Phase Asymmetric Interleaving Method to Reduce Current Ripple in Boost PFC Converter Using Model Predictive Current Control

This paper propose a phase asymmetric interleaving approach using model predictive current control (MPCC) in boost PFC converters to reduce current ripple. Unlike previous MPCC-based methods, this approach employs asymmetric phases with varying inductor sizes and sampling periods to reduce ripple without necessitating larger inductors. The auxiliary phase, featuring a smaller inductance, compensates for total inductor current ripple by enhancing its current slope. This method not only reduces current ripple but also reduces system weight and cost. The validity is verified by hardware-in-the-loop (HIL) simulation.