Design and Analysis of SAR-ADC for Low Power Circuits

This paper introduces an innovative concept centered on developing an 8-bit Asynchronous Successive Approximation Register (SAR) Analog to Digital Converter (ADC) utilizing state-of-the-art 18nm FinFET technology. This advanced asynchronous SAR system encompasses multiple crucial components, including a precisely engineered internal clock generator, a high-performance bootstrapped sample and hold circuit, a sturdy and highly effective dynamic comparator, a precise Digital-to-Analog Converter (DAC), and a sophisticated SAR logic. A notable feature of our design is its exceptionally low power consumption, operating within the microwatt (uW) range. These attributes position our ADC as an appealing solution for applications requiring a delicate balance between power efficiency, moderate resolution, and swift performance. These applications vary widely, from cutting-edge biomedical sensors to memory cores tailored to the high-performance demands of AI-driven computing applications. Essentially, our project not only signifies a technological advancement in SAR ADC design but also holds significant potential for influencing the future landscape of various electronic devices and systems.