Development of a Fast and Energy-Efficient Carrier Bypass Adder with Tunable Delay Extension Using the Han Carlson Adder

This paper introduces a novel Developing a fast, energy-efficient carry skip adder with configurable delay extension utilizing the Han Carlson adder, leveraging Han Carlson adder algorithm. Traditional carry skip adders are renowned for their ability to mitigate propagation delays associated with carry signals in conventional adders [1]. The Han Carlson adder further refines this approach, improving efficiency. Moreover, the inclusion of a variable latency extension empowers the adder to dynamically adjust its operating speed to suit varying computational requirements. The primary objective of this design is to strike a balance between speed and energy efficiency, rendering it applicable across a broad spectrum of applications [2]. The paper meticulously presents and analyzes the design and implementation details of this advanced architecture. Experimental results underscore its superior performance compared to existing adder architectures, validating its efficacy and potential impact on diverse computational domains.