Novel Multi-Stage Feedback Technique for Time Skew Calibration in Time-Interleaved ADCs

This paper introduces a novel low-complexity algorithm for time skew calibration, which is crucial in ensuring undistorted signal acquisition in a time-interleaved analog-to-digital conversion system. By approximating the absolute value of the difference during linear approximation, the algorithm decouples derivatives from the step size factor, significantly reducing computational complexity. An enhanced multi-stage feedback approach is employed to minimize Taylor series approximation errors without increasing the number of derivative calculations. Simulation results demonstrate notable improvements, with an SNDR above 66 dB and an SFDR above 69 dB achieved for single-tone sinusoidal signals after calibration. The algorithm remains effective for multi-tone and frequency modulation signals, demonstrating its versatility. Real-world experimental measurements validate the algorithm’s efficacy, highlighting its potential for practical applications with reasonable resource utilization. The proposed multi-stage feedback calibration technique consumes 1509 look-up tables (LUTs), 1409 flip flops (FFs), 33 Inputs/Outputs (I/Os), 1 buffer-global-clock (BUFG), 33 digital signal processors (DSPs), and 16.5 block random access memories (BRAMs) in the implementation, making it a practical solution for various applications.