Dual-channel Chip-to-Chip Communication Employing Field Enhancement Spoof Surface Plasmon Polaritons Transmission Line

A compact and field-confined spoof surface plasmon polaritons transmission line (SSPP-TL) is proposed for low loss and low crosstalk silicon interconnect operating at sub-terahertz (sub-THz) frequency. By decorating periodic sub-wavelength short stubs to traditional stripline, surface plasmon polaritons (SPP) can be excited with localized surface mode for low loss signal propagation. The radiation loss of the top metal implemented in complementary metal oxide semiconductor (CMOS) technology is greatly suppressed by the use of SSPP for silicon channel at the sub-THz frequency, aiming to dampen the channel electromagnetic crosstalk which is particularly prominent in the sub-THz range. A cascaded PLL is proposed for SSPP source generation at 140 GHz, which not only provides low noise signal but also synchronize the sub-THz signal from a low-frequency crystal oscillator. The voltage-controlled oscillator (VCO) was realized by a high-quality-factor resonance tank, aiming to reduce the power consumption and the phase noise. A fully-integrated on/off keying sub-THz silicon interconnect was designed in a 65 nm CMOS technology. Simulation results shown that the proposed sub-THz interconnect can recover up to 35 Gb/s on/off keying (OOK) data without the help of far-end crosstalk equalizer, whereas the recovered data in a conventional interconnect are fully distorted due to the significant crosstalk among channels.