Optimization of the Reverse Recovery Characteristics of 500V VDMOS

VDMOSFETs (Vertical Double-Diffused Metal-Oxide-Semiconductor Field Effect Transistors, VDMOS) are widely applied such as wireless communication equipment and RF power amplifiers, fast switching, the motor drives and so on, which play a crucial role in microelectronics and integrated circuit design. And their performance will directly affect the efficiency of the entire system. The performance of power MOSFET always has been optimizing because of the improved requirements of the applied market. So, a lot of attention has been played to the main characteristics parameters of VDMOS including the specific on-resistance (R
on,sp
) and the parasitic gate-drain capacitance (C
gd
). And with the deep optimization of the gate-drain capacitance, the reverse recovery Characteristics of VDMOS has an important effect on the switch speed and the switch loss, which became a research focus.In this paper, based on the 500V traditional VDMOSFET cell, a novel structure is proposed to reduce the reverse recovery charge (Q
RR
), which features with dual-trench gates instead of the planar gate and integrated Schottky contact. In the blocking mode, the gate in the trench works as the field plate, which will optimize the electric field distribution resulted in the increased breakdown voltage (BV). And it is also helpful to reduce the barrier lowing effect of Schottky contact due to the reduction of its electric field. Moreover, the reverse recovery characteristics of the proposed device is optimized owing to the integrated Schottky contact. These two structures are simulated by sentaurus. Under the same simulation conditions, the simulation results show that the breakdown voltages of the traditional VDMOS and the proposed structure are 545.5V and 565.9V, repectively, and Q
RR
of 1.05µC/cm
²
of the proposed structure is reduced by 70.8% compare with 3.60µC/cm
²
of the traditional VDMOS.