Exact Synthesis and Inversion Optimization for 3-input Resistive Majority based Logic-in-Memory

Resistive random access memories (RRAMs) serve as compact non-volatile storage devices capable of storing data and performing Boolean operations. They inherently support 3-input Resistive Majority (RM3) logic operations, making them integral to in-memory computing applications. Prior methods have adapted general-purpose logic networks for RM3 logic. This paper introduces RM
3
-inverter graphs (RM3IGs) as dedicated logic representations, employing RM3 and inverters as primitives. We utilize an exact synthesis algorithm to derive optimal RM3IG implementations for 4-input Boolean functions to establish a database. Then, leveraging a logic restructuring algorithm and the database, we derive initial RM3IG structures. Furthermore, we propose a heuristic algorithm for inversion optimization within RM3IGs. Our experimental results show a reduction in the number of nodes and inverters, demonstrating a 14.0% reduction in size and a 17.7% reduction in level compared to previous approaches.