AIP-SEM: An Efficient ML-Boost In-Place Soft Error Mitigation Method for SRAM-Based FPGA

With the wide application of SRAM-base FPGA in aerospace engineering, the radiation resistance performance of FPGAs becomes unprecedented important. To correct errors, the Triple Modular Redundancy (TMR) technique uses a voter and incurs significant PPA overhead. We propose an efficient in-place soft error mitigation method, that can mitigate soft errors without any additional PPA overhead. Compared to other synthesis-based algorithms, our method uses an XGBoost-based prediction model which predicts time-consuming circuit metrics. For the EPFL benchmark circuit, our approach achieves up to 19.42% runtime speedup, and under 3% loss on the failure rate reduction.