Implementation of a Turbo-Like Error Correction Decoder on a GPU

This article addresses the problem of long-time decoding of non-binary error-resistant codes. When implementing modems based on SDR devices and mini computers equipped with ARM family processors, it is important to increase the speed of the algorithms. To increase the speed of decoding blocks of error-correcting code, it is proposed to use graphic processors. The article discusses a non-binary noise-resistant turbo code of this type, as well as the implementation of a decoding algorithm based on a graphics processor. This implementation allows you to increase the data transfer rate when using complex signal-code structures. The results obtained will make it possible to implement radio communication modems with increased noise immunity.