Automatic High Functional Coverage Stimuli Generation for Assertion-based Verification

Assertion-based verification is a promising method that uses predefined rules, known as assertions, to check the functionality of hardware designs. The manual assertion definition is time-consuming and requires expert knowledge. Automatic assertion mining is gaining acceptance as a trustworthy method for assertion definition. Some automatic assertion miners extract assertions from simulation traces of the design, but the quality of mined assertions depends on the coverage of the stimuli used to generate the traces. Existing stimuli generation methods are either random or exhaustive. A random approach can only cover some design behavior, resulting in incomplete assertions. On the other hand, an exhaustive approach can cover all the design behavior but produces lengthy simulation traces that cause a high overhead for the miner. We propose a novel approach for stimul generation based on constraint random verification. A set of user-defined metrics then examines the generated stimuli to measure how much of the design specification has been exercised by the verification environment. Our approach uses a coverage model that defines, collects, and analyzes the design’s functionalities and identifies the gaps in the verification. The assertions generated by the proposed method have been compared with a well-known assertion miner, GoldMine. The result showed that our method detects $\mathbf{2 0 . 6 3 \%}$ more faults in the design than GoldMine in a shorter time. Moreover, it produces assertions that are about $\mathbf{7 9 \%}$ more effective.