CMOS Charge Pump Design for Minimal Silicon Footprint

In this work a novel charge pump design is presented with a primary focus on minimizing the associated silicon footprint while offering efficient step up conversion. The topology enables high switching frequency by connection of the oscillator's power supply to the output node. The Dickson charge pump is selected as test case, designed in a 180 nm CMOS process commercially available by XFAB. Simulation results showcase the advantages of the proposed voltage boosting scheme, achieving up to 75% silicon area reduction in low voltage level inputs, while providing rapid output rise time and low voltage ripple, compared to the conventional charge pump.