FPGA Implementation of Support Vector Regression for Battery SoC Estimation

The Battery Management System (BMS) optimizes the reliability and operational efficiency of lithium-ion batteries by monitoring their physical conditions and functional state, including the evaluation of the State of Charge (SoC). Accurate SoC estimation is challenging due to the nonlinear characteristics of Li-ion batteries and the influence of external factors. The aim of this research is to study the feasibility of hardware implementation of a Support Vector Regression (SVR) algorithm on a FPGA platform for SoC estimation based on voltage, current, and temperature measurements. Special attention was paid to the utilization of resources fostering the possibility of parallel monitoring, and thus enabling the simultaneous management of multiple battery cells. Two architectural configurations, 32-bit and 64-bit of data representations were explored and compared to identify an optimal trade-off between the area occupancy and error committed in the inference phase. The root-mean-square error (RMSE) committed with the developed hardware was compared with that committed on a PC running MATLAB software with a double precision data format. The 64-bit version resulted in a difference in the RMSE of 0.0016% utilizing 18.33% of the available DSPs, allowing for only 5 replicated on-board instances. On the other hand, the 32-bit version required only 6.25% of the available DSPs, thus enabling 16 parallel instances, with an RMSE difference of 0.10%.