Numerical Test for Stability Evaluation of Analog Circuits

In this contribution, a new numerical test for the stability evaluation of analog circuits is presented. Usually, if an analog circuit is unstable then the roots of its characteristic equation are localized on the right half-plane of the Laplace s- plane. Because this region is unbounded, we employ the bilinear transformation to map it into the unit disc on the complex plane. Hence, the existence of any root inside the unit disc implies circuit instability. In our test, we employ the global roots and poles finding algorithm based on phase analysis to detect the roots of the characteristic equation inside the unit disc. Unlike other stability tests, our approach allows one to evaluate the stability of analog circuits and systems whose characteristic equations are not polynomials. In order to demonstrate its efficiency, generality and applicability, we analyze a memristor-based chaotic circuit whose stability depends on the value of the fractional-order parameter. The proposed test correctly detects the parameter ranges of either stability or instability for the considered analog circuit.