Exploring the Performance of Hall Sensor With Substrate Bias Modulation in SOI Process

This article proposed a Hall cross plate for magnetic field detection with substrate biasing to improve the sensitivity. By adjusting the bias voltage of the reversed-biased p-n junction (
${V} _{\text {PN}}\text {)}$
formed by the n-well and the p-well underneath, we can modulate the thickness of the depletion layer and, thus, the effective thickness of the cross plate formed by the n-well, eventually ameliorating the sensitivity. We verified the proposed substrate-biased Hall sensor with finite-element analysis and measurement from the cross plate prototyped in the 180-nm silicon-on-insulator (SOI) CMOS process. From the measurement, the resistance of the cross-plate changes from 2.13 to 2.39 k
$\Omega $
when the
${V} _{\text {PN}}$
decreases from 0 to -0.6 V, indicating the variation in the sheet resistance, induced by the change in the thickness of the cross-plate. Moreover, the current-related sensitivity increased by 28.4% in the current mode when
${V} _{\text {PN}}$
changed from 0 to -0.6 V. The Hall plate achieves a current-related sensitivity of 0.3 V/mA
$\cdot $
T with a power consumption of 6.5 mW.