Hardware In the Loop Simulation of Solid State Trasformer for Smart Grid Applications

In this paper, the solid-state transformer (SST) concept for the residential application use is being presented. Regarding various arrangement of the power semiconductor converters within SST the proposal for 3-level configuration was initially given. Individual power circuit topologies have been designed reflecting the requirements on the operational conditions. In order to verify the SST functionality, the hardware in the loop (HIL) simulation model is later presented. For the HIL simulation purposes, PLECS environment and RT BOX 1 was used. Each of the power converter of SST concept was verified, while the control algorithms and control systems for individual power circuit have been modeled as well. As a result of HIL simulations, the evaluation of the performance operation are summarized individually for investigated power semiconductor converters of the proposed SST concept.