Design of High-Reliability LDO Regulator Combined with LVTSCR-Based ESD Protection Circuit Using Current Feedback Structure

Circuits designed for low-voltage applications need to ensure a consistent output voltage, even when the load current varies. This thesis focuses on optimizing the performance of a low dropout (LDO) regulator in relation to the load current and enhancing its reliability by combining an electrostatic discharge (ESD) protection circuit at the IC (integrated circuit) level. The existence of an ESD protection circuit is crucial for the reliability of the IC. The LDO regulator described in this thesis is highly reliable in ESD situations. Because of combining with a low triggered silicon controlled rectifier (LVTSCR)-based ESD protection circuit in both the I/O and POWER CLAMP. The measurement results indicate that this LDO regulator is capable of not only precisely controlling the output voltage in response to changes in the load current but also maintaining voltage stability during ESD surges. Additionally, the LDO regulator, when combined with the ESD protection circuit and implemented using a 0.18 μm BCD process, managed to maintain the voltage undershoot to 47.5 mV and overshoot to 51.4 mV for a load current of 200 mA.