Low Power High Speed Inverter Based Differential Input Dynamic Comparator

High-speed, High-resolution ADCs are increasingly used in communication applications, where the need for dynamic comparator arises. This paper proposes a low power high speed inverter based differential input cascode cross-coupled dynamic comparator. By using the inverter based differential input concept to the existing cascode architecture low power consumption was achieved. Due to increased transconductance the design works at low voltages too. The proposed design and existing designs are simulated in 45nm technology, illustrating that the proposed comparator has a significant benefit in power consumption. It produces a low power of 15.89 pW.